TSMC to mass-produce 3-nanometer chips in Kumamoto
Taiwan Semiconductor Manufacturing Co., the world's largest chip foundry, said Thursday (February 5) that it will start mass-production of cutting-edge semiconductors with a circuit line width of 3 nanometers at its second plant in the town of Kikuyo in Kumamoto Prefecture, southwestern Japan.
TSMC Chairman and CEO C. C. Wei conveyed this plan to Japanese Prime Minister Sanae Takaichi when they met at the prime minister's office in Tokyo the same day.
It would be the first mass-production of such semiconductors in Japan, if realised.
The Japanese government will mull providing the Taiwanese firm with further aid as it believes that the planned mass production will lead to the enhancement of Japan's economic security.
In his meeting with Takaichi, Wei said that 3-nanometer technology will form the foundation of Japan's artificial intelligence business. "I would like you to promote the plan," the prime minister replied.
Among various types of semiconductors, 3-nanometer chips are used in AI data centres and robots.
TSMC had announced plans to invest 12.2 billion dollars, or some 1.9 trillion yen, to manufacture 6-nanometer and 12-nanometer chips at the second Kumamoto plant, and the industry ministry had decided to provide support of up to 732 billion yen for TSMC.
The support is expected to be increased in line with the change in the business plan.
Of other chipmakers, Tokyo-based Rapidus Corp. plans to begin mass-production of 2-nanometer chips at its plant in the city of Chitose in the northernmost prefecture of Hokkaido in fiscal 2027.
The smaller the size in nanometers, the superior the performance.
[Copyright The Jiji Press, Ltd.]
